Patent Translate
Powered by EPO and Google
This translation is machine-generated. It cannot be guaranteed that it is intelligible, accurate,
complete, reliable or fit for specific purposes. Critical decisions, such as commercially relevant or
financial decisions, should not be based on machine-translation output.
■ Stereo matrix device ■ Japanese Patent Application No. 45-953810 Application No. 45
(1970) October 28 @ inventor Yamada Haruhomonshin city Bold Kamon Shino 1006 Matsushita
Electric Industrial Co., Ltd. Uchimura Takuhiro Nakado Office 0 Applicant Matsushita Electric
Industrial Co., Ltd. Company Kadoma city Oji Kadoma 1006 [phase] agent patent attorney Toshio
Nakao 1 person outside
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a connection diagram of a stereo matrix device
according to an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram of
the relevant part, and FIG. 3 is a connection diagram of a conventional stereo matrix circuit.
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a stereo matrix
device used in a television audio multiplex broadcast receiver etc., and it is an object of the
present invention to increase S / N and stereo separation. The conventional stereo matrix device
is configured as shown in FIG. That is, in-phase and anti-phase signals are taken out from the
emitter and the collector of the transistor 1 to which the difference signal (L-R) is applied to the
base. Then, the sum signal (L + R) applied to the terminal 2 is superimposed on these signals by a
circuit composed of the resistors 3, 4, and 5.6, and the stereo signals 2R and 2L separated from
the terminals 7 and 8 are taken out. be able to. However, this matrix device has a problem that
the S / N ratio is poor because the signal attenuation is large, and that the degree of separation
on the left and right is only about 30 dB. The present invention ameliorates this drawback and is
further configured to be suitable for a single semiconductor integrated circuit, and an
embodiment thereof will be described below with reference to the drawings. In FIG. 1, in
[111111], 11 is an input terminal of a difference signal (L-R), 12 is an (L-to-R) input terminal of a
sum signal, 13.14 is a transistor constituting a differential amplifier, 15.16 Are transistors
constituting an amplifier having equal amplification, 17 is an emitter resistor of transistor 15, 18
is an emitter resistor of transistor 16, 19 is a common load resistance of transistor 13.15, and 20
is a common of transistor 14.16. A load resistor 21 is a resistor for emitter coupling. Each of
22.23 is an output terminal. Reference numerals 24.25 denote transistors forming a constant
current circuit for making the emitter current of the transistors 13.14 forming the differential
amplifier constant. 26 ° 27 are resistors for adjusting the manual impedance respectively. Next,
the operation of the embodiment configured as described above will be described. When a stereo
difference signal (L-R) is applied to the input terminal 11, the output terminal 22 ° 23 Vc is
synchronized with the reverse phase signal of the difference signal (L-R) by the differential
amplifier configured by the transistors 13.14 V-. Each signal is generated. Similarly, when a
stereo sum signal (L to R) is applied to the input terminal 12, the amplification function of the
transistor 15.16 causes the output terminal 22.23 VC to generate a reverse phase signal of the
sum signal (L + R). Therefore, when a difference signal (L-R) is applied to the input terminal 11
and a sum signal (L + R) is simultaneously applied to the input terminal 12, the following outputs
are generated on the output terminal 22.23.
The output of the output terminal 22 = -A (LR) -A ('L + R) =-2AL The output of the output
terminal 23 = + A (LR) -A (L + R) =-2AR (wherein A constitutes an amplifier) Thus, the left and
right signals of the stereo are obtained at the output terminal 22.23. However, it is necessary
that the gain A be equal between the differential amplifier [111111] EndPage: 1 unit and the sum
signal amplifier. In general, even if there is no fractional distortion or phase distortion, the gain
[111111] and therefore the gain ratio is minimum at R8-0. Further, since the resistance R8 of the
constant current circuit has a size of several tens of ohms and vb 2 / β is about several tens of
ohms, the gain difference can be ignored. In the equivalent circuit shown in FIG. 2, R and R
respectively denote collector resistances, rbt5rb2 denotes a base resistance, R6tsRe2 denotes an
external resistance connected to the emitter of the transistor, and Eo denotes an emitter power
supply. β is a current thinning ratio, vb is a base bias voltage, and vin is a human power signal.
Furthermore, although the gain of the sum signal amplifier by the transistor 5.16 is previously
made equal to that of the differential amplifier by the transistor 13.14, it can not be optimally
obtained only by adjusting the magnitude of the left and right separation human power.
Alternatively, 1 B can be adjusted to be optimal. In order to optimize the operating region, it is
necessary to adjust the base bias so that the non-signal currents of the transistors 13, 14.15 and
16 become almost equal. As described above, according to the present embodiment, the degree
of stereo separation can be improved by 20 dB as compared with the prior art, and the signal is
amplified by the matrix circuit so that the S / N can be improved. Furthermore, semiconductor
integrated V- & Ur is always effective, such as that circuits are directly connected and that stable
separation can be obtained if the temperatures of the respective transistors 13.14 and 15.16 are
equal. In addition, a differential amplifier in which only one resistor is inserted excluding the
constant current circuit according to the present embodiment is also conceivable [111111] Next,
based on the equivalent circuit of the differential amplifier shown in FIG. Calculate the gain
difference of the negative phase output. It is as follows when the left-right F) lcn'px'p change with
respect to human power is calculated ¦ required. In this case, it is necessary to make the
resistance value of the load resistor 19.20 different in order to balance the left and right, and
there is a drawback that the adjustment becomes complicated. As is apparent from the above
embodiment, the stereo matrix device according to the present invention is constituted by a
differential amplifier in which the emitter current is constant by a constant current circuit, and
two transistors which respectively share the two collector load resistors of this differential
amplifier. A first amplifier and a second amplifier.
Therefore, one of the stereo difference signal and the sum signal is manually input to the
differential amplifier, and the other is input to the first and second amplifiers in common to
amplify the signal and simultaneously perform separation. It is possible to improve the / N and
the separation characteristics. In addition, since the emitter current is made constant by the
constant current circuit, the left and right balanced separation can be achieved by symmetrically
configuring the two load resistors and the first and second amplifiers using the circuit elements
of the identification number. Can provide a good device.